1. Field of the Invention
The present invention relates to an image sensor. More specifically, the present invention relates to a method for manufacturing a CMOS image sensor using a photo resist mask pattern with a more accurate size.
2. Discussion of the Related Art
An image sensor is a device which is capable of converting an optical image into an electrical signal. Typically, image sensors are either complementary metal-oxide-silicon (CMOS) image sensors or charge coupled device (CCD) image sensors. The CCD image sensor has excellent photo sensitivity and noise characteristics, but are difficult to use in highly-integrated devices and have high power consumption rates as compared to the CMOS image sensor. In comparison, the CMOS image sensors have simpler processes, are more suitable for highly-integrated devices and have a lower power consumption than the CCD image sensor. Because of these advantages, various techniques for manufacturing a CMOS image sensor for semiconductor devices have been developed.
Generally, the pixel of the CMOS image sensor comprises photodiodes capable of receiving light and transistors capable of receiving image signal input from the photodiodes. The CMOS image sensors are either three T types or four T types, depending on the number of the transistors. Typically, a 3 T type CMOS image sensor includes one photo diode and three transistors, while the four T type sensor has one photo diode and four transistors.
One important aspect of the CMOS image sensors of the related art is a pixel area capable of receiving light in order to generate a signal. As shown in FIG. 1A, the pixel area includes a well (not shown) that is formed in an implantation process using photo resist mask patterns 2 and 3.
Ideally, as shown in FIG. 1B, a butterfly-shaped mask pattern 2 is fabricated and used so that the well is formed to a predetermined size of, for example, 0.25 μm, while an island-shaped mask pattern 3 is formed with the width of, for example, 0.76 μm.
However, in the manufacturing processes of the related art the distance between portions of the butterfly-shaped mask pattern 2 which are used to form the well and the size of the island-shaped mask pattern 3 are properly correlated. Specifically, the well is first formed with a width that is equal to the predetermined width of the well. This distance is modified during the subsequent implantation process, resulting in a well area is not properly formed. Because the final well area has the incorrect size, there are problems properly driving the transistor of the pixel area.
Specifically, in the related art the size of the butterfly-shaped mask pattern 2 and the size of the island-shaped mask pattern 3 are not accurately correlated to account for the difference in the pattern types, since one is typically implemented as a positive pattern while the other is a negative pattern. Thus, if the butterfly-shaped mask pattern 2 is sized to create a well of 0.25 μm, the resulting island-shaped mask pattern 3 is approximately 0.46 μm, rather than 0.76 μm as desired.
Accordingly, in order to form a well so that the transistor of the pixel area is accurately driven, it is necessary to implement a photo resist mask pattern of an accurate size.